muxinput,
muxinputwo,
select,
muxout
);
input muxinput,muxinputwo,select;
output muxout;
reg muxout;
always@(select or muxinputwo or muxinput)
begin
if(select==1'b0) begin
muxout = muxinput;
end
else
begin
muxout = muxinputwo;
end
end
endmodule
OUTPUT Rangkaian Logika MUX 2 bit
